Circuit-and-heat-dissipation assembly and method of making the same

ABSTRACT

Disclosed herein is a circuit-and-heat-dissipation assembly which includes: a heat sink including a heat absorbing base and a heat dissipating element, the heat absorbing base having a circuit-forming surface and an element-forming surface, the heat dissipating element protruding from the element-forming surface for dissipating heat conducted from the heat absorbing base into an ambient environment; an insulator layer formed on the circuit-forming surface; and a patterned circuit formed on the insulator layer and having an electroless plating layer which has a patterned catalyst seed layer comprising an active metal and formed on the insulator layer, and a reduced metal layer formed on the catalyst seed layer. Also disclosed herein is a method of making the circuit-and-heat-dissipation assembly.

CROSS REFERENCE TO RELATED APPLICATIONS

This application is a divisional application of U.S. patent applicationSer. No. 14/744,496, filed on Jun. 19, 2015, which claims priority ofTaiwanese Patent Application No. 103121575, filed on Jun. 23, 2014. Thisapplication claims the benefits and priority of all these priorapplications and incorporates by reference the contents of these priorapplications in their entirety.

FIELD OF INVENTION

Embodiments of the invention generally relate to acircuit-and-heat-dissipation assembly and a method of making the same,more particularly to a circuit-and-heat-dissipation assembly including aheat sink and a patterned circuit formed on the heat sink.

BACKGROUND

FIGS. 1A to 1F illustrate consecutive steps of a method of making anelectronic assembly, such as a headlight electronic module. The methodincludes: enclosing an aluminum substrate 11 with an insulator layer 12(see FIG. 1A); forming a copper layer 13 on the insulator layer 12 so asto form a circuit preform 10 (see FIG. 1B); attaching the circuitpreform 10 to a planar plate 151 of a heat sink 15 through a thermalgrease 14 (see FIG. 1C); patterning the copper layer 13 to form acircuit pattern 131 on the insulator layer 12 using semiconductorprocessing techniques (see FIG. 1D), the circuit pattern 131 havingenlarged soldering ends 132 (serving as bonding pads 132); forming asolder mask layer 134 on the circuit pattern 131 (see FIG. 1E); andmounting a plurality of electronic components 17, such as LED chips, onthe circuit pattern 131 using surface mounting techniques, such that theelectronic components 17 are bonded to the bonding pads 132,respectively (see FIG. 1F with reference to FIG. 1E).

There may be a need for providing a method of making an electronicassembly that is simple and cost effective.

SUMMARY

In certain embodiments of the disclosure, a circuit-and-heat-dissipationassembly may be provided. Such a circuit-and-heat-dissipation assemblymay include: a heat sink including a heat absorbing base and a heatdissipating element, the heat absorbing base having a circuit-formingsurface and an element-forming surface opposite to the circuit-formingsurface, the heat dissipating element being connected to and protrudingfrom the element-forming surface for dissipating heat conducted from theheat absorbing base into an ambient environment; an insulator layerformed on the circuit-forming surface; and a patterned circuit formed onthe insulator layer.

In certain embodiments of the disclosure, a method of making acircuit-and-heat-dissipation assembly may be provided. Such a method mayinclude: preparing a heat sink that includes a heat absorbing base and aheat dissipating element, the heat absorbing base having acircuit-forming surface and an element-forming surface, the heatdissipating element protruding from the element-forming surface fordissipating heat conducted from the heat absorbing base into an ambientenvironment; forming an insulator layer on the circuit-forming surface;and forming a patterned circuit on the insulator layer.

In certain embodiments of the disclosure, a circuit-and-heat-dissipationassembly may be provided. Such a circuit-and-heat-dissipation assemblymay include: a heat sink including a circuit-forming surface; aninsulator layer formed on the circuit-forming surface; a patternedcircuit formed on the insulator layer, the patterned circuit includingat least one pair of spaced apart conductive lines; and aheat-dissipating block formed on the circuit-forming surface andextending therefrom through the insulator layer toward the conductivelines.

BRIEF DESCRIPTION OF THE DRAWINGS

Other features and advantages of the disclosure will become apparent inthe following detailed description of the exemplary embodiments withreference to the accompanying drawings, of which:

FIGS. 1A to 1F are perspective views illustrating consecutive steps of amethod of making an electronic assembly;

FIGS. 2A to 2E are perspective views illustrating consecutive steps of amethod of making a circuit-and-heat-dissipation assembly in certainembodiments according to the disclosure;

FIG. 3 is a perspective view illustrating a step of forming anelectroplating layer that may be included in the method of making thecircuit-and-heat-dissipation assembly in certain embodiments accordingto the disclosure;

FIGS. 4A to 4C are perspective views illustrating consecutive steps offorming a patterned catalyst seed layer that may be included in themethod of making the circuit-and-heat-dissipation assembly in certainembodiments according to the disclosure;

FIGS. 5A and 5B are perspective views illustrating steps of patterning aflexible sheet to form a patterned mask and attaching the patterned maskonto a heat sink that may be included in the method of making thecircuit-and-heat-dissipation assembly in certain embodiments accordingto the disclosure;

FIG. 6 is a perspective view illustrating a step of patterning aflexible sheet to form a patterned mask that may be included in themethod of making the circuit-and-heat-dissipation assembly in certainembodiments according to the disclosure; and

FIG. 7 is a schematic view illustrating a step of forming a heatdissipating block that may be included in the method of making thecircuit-and-heat-dissipation assembly in certain embodiments accordingto the disclosure.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

It may be noted that like elements are denoted by the same referencenumerals throughout the disclosure.

FIGS. 2A to 2E illustrate consecutive steps of certain embodiments of amethod of making a circuit-and-heat-dissipation assembly, such as aheadlight electronic module. The method may include the followingconsecutive steps (see FIGS. 2A to 2E). A heat sink 2 is prepared (seeFIG. 2A), and includes a heat absorbing base 21 having a circuit-formingsurface 211 and an element-forming surface 212 opposite to thecircuit-forming surface 211, and a heat dissipating element 22 connectedto and protruding from the heat absorbing base 21 for dissipating heatconducted from the heat absorbing base 21 into an ambient environment.An insulator layer 3 is then formed on the circuit-forming surface 211(see FIG. 2B). After that, a patterned catalyst seed layer 41 comprisingan active metal is formed on the insulator layer 3 (see FIG. 2C). Areduced metal layer 42 is then formed on the patterned catalyst seedlayer 41 (see FIG. 2D) by reducing metal ions in an electroless platingbath (not shown) through the catalyst seed layer 41. The reduced metallayer 42 cooperates with the patterned catalyst seed layer 41 to definea patterned electroless plating layer 51. Thereafter, a plurality ofelectronic components 6, such as LED chips, are mounted on the patternedelectroless plating layer 51 (see FIG. 2E).

In these embodiments, the patterned electroless plating layer 51 aloneserves as a patterned circuit 5 for direct mounting of the electroniccomponents 6 thereon. Particularly, the patterned circuit 5 includespairs of spaced apart conductive lines 50, each of which has an enlargedsoldering end 501. Each of the electronic components 6 may be bonded orsoldered to the enlarged soldering ends 501 of a corresponding pair ofthe conductive lines 50 using techniques, such as surface mounttechnology. The conductive lines 50 may have a thickness ranging from 18μm to 20 μm and a line width ranging from 3 mm to 10 mm.

In certain embodiments, the active metal may be selected from the groupconsisting of palladium, rhodium, platinum, iridium, osmium, gold,nickel, iron, and combinations thereof. The reduced metal layer 42formed from the electroless plating may contain a metallic materialhaving a heat conductivity (K) greater than 95 W/m·K and a resistance(ρ) less than 75 nΩ·m. One Example of the metallic material may becopper (K=400 W/m·K, ρ=16.78 nΩ·m).

In certain embodiments, the heat dissipating element 22 may be in theform of a structure selected from the group consisting of fins, a heatpipe, and combinations thereof. In certain embodiments, the heatdissipating element 22 may be in the form of fins.

In certain embodiments, the heat sink 2 is a single piece. In certainembodiments, the heat sink 2 may be made from aluminum extrudate.

In certain embodiments, the insulator layer 3 may be formed on thecircuit-forming surface 211 using electrophoretic deposition techniques,and may be made from a resin material, such as epoxy. The insulatorlayer 3 may extend continuously from the circuit-forming surface 211 tothe element-forming surface 212. In certain embodiments, the insulatorlayer 3 may enclose an entire outer surface of the heat sink 2.

In certain embodiments, referring to FIG. 3, in combination with FIG.2E, the method may further include forming a patterned electroplatinglayer 52 on the electroless plating layer 51 using electroplatingtechniques. In these embodiments, the patterned electroplating layer 52and the electroless plating layer 51 cooperatively define the patternedcircuit 5 for mounting of the electronic components 6 thereon.

In certain embodiments, the patterned electroplating layer 52 may bemade from nickel (K=99.9 W/m·K, ρ=69.3 nΩ·m).

In certain embodiments, referring to FIGS. 4A to 4C, the heat absorbingbase 21 is curved in shape and the patterned catalyst seed layer 41 maybe formed on the insulator layer 3 by: covering the insulator layer 3with a patterned mask 8 (see FIG. 4A), the patterned mask 8 being formedwith a pattern of through-holes 81 that corresponds to a pattern of thepatterned catalyst seed layer 41; applying a curable ink 40 containingthe active metal onto the patterned mask 8 to fill the through-holes 81with the curable ink 40 using a sprayer 91 (see FIG. 4B); removing thepatterned mask 8 from the insulator layer 3 (see FIG. 4C); and curingthe curable ink 40 to form the patterned catalyst seed layer 41 (seeFIG. 4C). Alternatively, the patterned catalyst seed layer 41 may beformed by applying a powder coating material containing the active metalonto the patterned mask 8 or by immersing the assembly of the patternedmask 8, the insulator layer 3 and the heat sink 2 in a solutioncontaining the active metal.

In certain embodiments, referring to FIGS. 5A and 5B, the patterned mask8 may be formed by placing a flexible sheet 82 against a planar surfaceof a substrate 92, followed by patterning the flexible sheet 82 using alaser beam 93 through laser ablation or laser burnout techniques (seeFIG. 5A). In certain embodiments, the circuit-forming surface 211 of theheat absorbing base 21 may be curved in shape (see FIG. 5B), so that acovering surface 301 of the insulator layer 3 that covers thecircuit-forming surface 211 may also be curved in shape. Since thepatterned mask 8 thus formed is flexible, the same can conform to acurved profile of the covering surface 301 or the circuit-formingsurface 211 when covering the insulator layer 3. Alternatively, theflexible sheet 82 may be directly placed against the covering surface301 of the insulator layer 3 (which has a curved profile) during laserablation (see FIG. 6).

In certain embodiments, the patterned mask 8 may be made from a materialselected from the group consisting of polyethylene terephthalate andrubber.

In certain embodiments, referring to FIG. 7, the method may furtherinclude the steps of: forming a plurality of holes 31 in the insulatorlayer 3, such that the holes 31 expose a plurality of contact regions2112 of the circuit-forming surface 211, each of the holes 31 beingaligned with a gap 502 defined by two enlarged soldering ends 501 of acorresponding pair of the conductive lines 50 of the patterned circuit5; and forming a plurality of heat dissipating blocks 72 on the contactregions 2112, respectively, such that each of the heat dissipatingblocks 72 extends toward a corresponding pair of the conductive lines 50from the corresponding contact region 2112 through the correspondinghole 31 in the insulator layer 3 and into the corresponding gap 502 tocontact a heat sink or heat dissipating substrate (not shown) of acorresponding one of the electronic components 6.

In certain embodiments, the heat dissipating blocks 72 may be made froma thermal grease, and may be formed by coating techniques.

In certain embodiments, the holes 31 in the insulator layer 3 may beformed after formation of the patterned circuit 5 using laser ablationtechniques. Alternatively, the holes 31 in the insulator layer 3 may beformed before formation of the patterned circuit 5. For instance, themethod may include: forming a non-patterned catalyst seed layer (notshown) on the insulator layer 3; forming a non-patterned reduced metallayer (not shown) on the non-patterned catalyst seed layer 41; andpatterning the non-patterned reduced metal layer and the non-patternedcatalyst seed layer 41 and forming the holes 31 in the insulator layer 3using laser ablation techniques.

In certain embodiments, the heat generated from the electroniccomponents 6 may be conducted through the patterned circuit 5, theinsulator layer 3 and the heat sink 2 into the atmosphere, which rendersthe circuit-and-heat-dissipation assembly of the certain embodimentsmore efficient in heat dissipation as compared to the aforesaidelectronic assembly.

While the disclosure has been described in connection with what areconsidered the exemplary embodiments, it is understood that thisdisclosure is not limited to the disclosed embodiments but is intendedto cover various arrangements included within the spirit and scope ofthe broadest interpretation so as to encompass all such modificationsand equivalent arrangements.

What is claimed is:
 1. A method of making a circuit-and-heat-dissipationassembly, comprising: preparing a heat sink that includes a heatabsorbing base and a heat dissipating element, the heat absorbing basehaving a circuit-forming surface and an element-forming surface, theheat dissipating element protruding from the element-forming surface fordissipating heat conducted from the heat absorbing base into an ambientenvironment; forming an insulator layer on the circuit-forming surface;and forming a patterned circuit on the insulator layer, wherein thepatterned circuit is formed on the insulator layer by forming apatterned electroless plating layer on the insulator layer usingelectroless plating techniques, and wherein the patterned electrolessplating layer is formed on the insulator layer by: forming a catalystseed layer comprising an active metal on the insulator layer; andforming a reduced metal layer on the catalyst seed layer by reducingmetal ions through the catalyst seed layer.
 2. The method as claimed inclaim 1, wherein the catalyst seed layer is a patterned catalyst seedlayer.
 3. The method as claimed in claim 1, wherein the catalyst seedlayer is a non-patterned catalyst seed layer and is subjected topatterning.
 4. The method as claimed in claim 1, wherein a patternedelectroplating layer is formed on the electroless plating layer usingelectroplating techniques.
 5. The method as claimed in claim 2, whereinthe patterned catalyst seed layer is formed on the insulator layer by:covering the insulator layer with a patterned mask, the patterned maskbeing formed with a pattern of through-holes that corresponds to apattern of the patterned catalyst seed layer; and applying an inkcontaining the active metal onto the patterned mask to fill thethrough-holes with the ink.
 6. The method as claimed in claim 5, whereinthe pattern of the patterned mask is formed by laser ablationtechniques.
 7. The method as claimed in claim 5, wherein thecircuit-forming surface of the heat absorbing base is curved in shape,the patterned mask being flexible and conforming to the circuit-formingsurface when covering the insulator layer.
 8. The method as claimed inclaim 1, further comprising: forming at least one hole in the insulatorlayer, such that the hole exposes a contact region of thecircuit-forming surface and that the hole is aligned with a gap definedby two soldering ends of a pair of conductive lines of the patternedcircuit; and forming a heat dissipating block on the contact region,such that the heat dissipating block extends from the contact regionthrough the hole in the insulator layer and into the gap.
 9. The methodas claimed in claim 1, wherein the heat dissipating element is in theform of fins.
 10. The method as claimed in claim 1, wherein the reducedmetal layer is formed on the catalyst seed layer by reducing the metalions in an electroless plating bath through the catalyst seed layer.